A Completely Integrated, Low Noise, Low Power CMOS Frequency Synthesizer for GSM Communications

A low power 22-mW 900MHz Frequency Synthesizer (FS), with an on-chip LC-tuned voltage controlled oscillator (VCO) for GSM applications is presented. The synthesizer possesses several novel features that include a completely integrated structure, a low phase noise on-chip LC VCO, a low-power Dual-Modulus Divider (DMD) in CML topology, a compensated charge pump with balanced switching, an on-chip third order loop filter and a proposed relatively easy to implement fractional accumulator based frequency synthesis technique. The complete synthesizer achieves in-band phase noise characteristics better than -110 dBc/Hz at 100kHz offset. The channel switching time is less than 500μs for a 25MHz frequency hop. The synthesizer is able to accommodate all 195 transmit and receive channels in the RGSM band. The proposed architecture has been realized using the 0.5 μm AMI C5N technology. The complete integrated synthesizer occupies less than 1500 × 700 μm of die real estate.